RISC-V
- Added on 2023-08-12
- Page: https://en.wikipedia.org/wiki/RISC-V
- See on Internet Archive
- #cpu #risc-v
RISC-V[b] (pronounced "risk-five",[1]: 1 ) is an open standard instruction set architecture (ISA) based on established reduced instruction set computer (RISC) principles. Unlike most other ISA designs, RISC-V is provided under royalty-free open-source licenses. A number of companies are offering or have announced RISC-V hardware; open source operating systems with RISC-V support are available, and the instruction set is supported in several popular software toolchains.